february 28, 2001 bti confidential & proprietary information page 1 of 4 r f i c s f o r g s m c e l l u l a r g r t t m overview data sheet: BT2084A dual-band gsm & dcs single chip rf transceiver p r e l i m i n a r y d a t a s h e e t features ? highly integrated complete dual-band gsm900 and dcs1800 / pcs1900 rf transceiver ? low noise and wide dynamic range receiver ? greater than 35db on-chip image rejection in receive mode ? over 90db overall gain control in 2db steps in receive mode ? offset pll transmitter architecture ? operating supply voltage from 2.7v to 3.3v ? ambient temperature range (-40 c to +85 c) ? low power bicmos silicon technology ? 48l qlp package with exposed ground pad functions ? receiver: dual low noise amplifier (lna) w/ gain control dual image reject rxrf mixer if output buffer if input buffer w/ gain control rxif mixer automatic gain control (agc) i/q demodulator baseband channel select filter with tuning baseband i/q buffer dc offset calibration ? transmitter: i/q modulator offset pll - downconversion mixer - phase detector ? iflo buffer ? rflo buffer applications ? gsm/dcs handsets & communication systems ? rf wireless modems ? rf wireless communications products general description the BT2084A is a highly integrated low power silicon bicmos rf transceiver designed for dual-band gsm900 and dcs1800/pcs1900 handset applications. the BT2084A consists of a receiver, transmitter, and both if and rflo buffer sections. the receiver can be divided into two sections. the first section is the receiver front-end which consists of a low noise amplifier (lna), image-reject downconversion mix- ers and an if output buffer. this section provides amplifi- cation for the incoming signal with low noise and high linearity. it also provides more than 35db image sup- pression and 20db gain control. the second section con- sists of an if input buffer, if downconversion mixer, automatic gain control (agc), i/q demodulator, base- band channel select filter, and a baseband buffer. this section provides second downconversion and i/q demodulation to the channel-selected signal and an additional on-chip channel selection. the if input buffer and agc perform over 90db gain control in 2db steps. ordering information BT2084A gsm/dcs/pcs dual-band rf transceiver bti, 13825 cerritos corporate dr., cerritos ca. 90703, u.s.a. tel (562) 407-0500 fax (562) 407-0510 sales@betheltronix.com www.betheltronix.com 36 35 34 33 32 31 30 29 28 27 26 25 1 2 3 4 5 6 7 8 9 10 11 12 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 4 8 4 7 4 6 4 5 4 4 4 3 4 2 4 1 4 0 3 9 3 8 3 7 clock enable reset vddctrl vddtxif txvcoin vddrxbb rxip rxin rxqp rxqn fref out_gsm outb_gsm in_dcs inb_dcs txip txin txqp txqn gndtxbb vddtxbb vddiflo ifloin o u t _ d c s o u t b _ d c s v d d l n a i n b _ g s m v d d r f m x i f _ o u t i f _ o u t b v d d r f l o r f l o i n g n d c t r l d a t a v d d a g c v d d r x i f 2 i f _ i n v d d r x i f t x c p o u t v d d i f d g n d i f d r x 1 o n r x 2 o n i f _ i n b i n _ g s m t x o n b a n d s e l bti BT2084A
dual-band gsm & dcs single chip rf transceiver BT2084A february 28, 2001 bti confidential & proprietary information page 2 of 4 r f i c s f o r g s m c e l l u l a r g r t t m p r e l i m i n a r y d a t a s h e e t the transmitter employs an offset pll architecture and also consists of two sections. the first section is the i/q modulator which upconverts the incoming baseband signal to the common if frequency. the second section is the offset pll, which consists of a downconversion mixer and a phase detector. the phase detector com- pares the downconverted external tx vco output and the upconverted baseband input at the common if fre- quency. the output of the phase detector controls the off-chip tx vco to generate the rf transmit signal. the iflo section includes buffers and dividers that pro- vide lo signals for both receiver and transmitter sec- tions. the input to the iflo section is generated from an off-chip vco. the rflo section includes buffers that provide lo signals for both the receiver and transmitter. the input to the rflo section is also generated from an off-chip vco. the operation of the transceiver in different modes is controlled using combinations of the rx1on, rx2on, txon, and bandsel pins ( table #2 ). the other opera- tion set-ups such as gain control in the lna, if buffer, and the agc are provided digitally through a 3-wire interface with a microcontroller or baseband processor ( table #3 ). functional block diagram 36 35 34 33 32 31 30 29 28 27 26 25 1 2 3 4 5 6 7 8 9 10 11 12 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 4 8 4 7 4 6 4 5 4 4 4 3 4 2 4 1 4 0 3 9 3 8 3 7 clock enable reset vddctrl vddtxif txvcoin vddrxbb rxip rxin rxqp rxqn fref out_gsm outb_gsm in_dcs inb_dcs txip txin txqp txqn gndtxbb vddtxbb vddiflo ifloin o u t _ d c s o u t b _ d c s v d d l n a i n b _ g s m v d d r f m x i f _ o u t i f _ o u t b v d d r f l o r f l o i n g n d c t r l d a t a v d d a g c v d d r x i f 2 i f _ i n v d d r x i f t x c p o u t v d d i f d g n d i f d r x 1 o n r x 2 o n i f _ i n b i n _ g s m t x o n b a n d s e l cp digital control registers dcs 2 ? ? 2 ? ? 4 ? ? agc 4 ? ? ir fltr gsm ir fltr power down control rxrf rxif rxbb iflo rflo tx
february 28, 2001 bti confidential & proprietary information page 3 of 4 r f i c s f o r g s m c e l l u l a r g r t t m dual-band gsm & dcs single chip rf transceiver BT2084A p r e l i m i n a r y d a t a s h e e t application circuit 3 9 3 7 3 8 4 6 4 4 4 2 4 0 4 5 4 3 4 1 4 8 4 7 o u t _ d c s o u t b _ d c s v d d l n a i n _ g s m i n b _ g s m v d d r f m x i f _ o u t i f _ o u t b v d d r f l o r f l o i n g n d c t r l d a t a 1 3 5 7 9 10 12 2 4 6 8 11 2 2 2 4 2 3 1 5 1 7 1 9 2 1 1 6 1 8 2 0 1 3 1 4 27 25 26 34 32 30 28 33 31 29 36 35 out_gsm outb_gsm in_dcs inb_dcs txip txin txqp txqn gndtxbb vddtxbb vddiflo ifloin clock enable reset vddctrl vddtxif txvcoin vddrxbb rxip rxin rxqp rxqn fref v d d a g c v d d r x i f 2 i f _ i n i f _ i n b v d d r x i f t x c p o u t v d d i f d g n d i f d r x 1 o n r x 2 o n t x o n b a n d s e l BT2084A bti 1000pf 0.1 m f vdd 100pf 0.1 m f vdd 100pf 0.1 m f vdd from gsm baseband 68 w 4.7nf 470pf 150 w 150pf 10 w gsm: 880 ~ 915mhz dual band tx vco 10 w 390 w dcs: 1710 ~ 1785mhz antenna gsm dcs pa 100pf 1805~1880mhz 554 ~ 610mhz iflo -10dbm 1162 ~ 1644mhz rflo input -8dbm from m p 225mhz saw filter il = 5db 3db bw = 200khz 100pf to gsm baseband 3.3pf 6.8nh 3.3pf 1 5 0 w 1 5 0 w 8.2nh 8.2nh 1 5 0 w 1 5 0 w 3.3nh 3.3nh 2.2pf 2.2pf 925~960mhz 3.3pf 6.8nh 3.3pf 2.2pf 2.2pf 1000pf 0.1 m f vdd from m p 100pf 0.1 m f vdd 100pf 0.1 m f vdd from m p from m p 100pf 0.1 m f vdd 1000pf 0.1 m f vdd 100pf 0.1 m f vdd 100pf 0.1 m f vdd 100pf 0.1 m f vdd 100pf 0.1 m f vdd 3 6 0 n h 3 6 0 n h 1.5pf 1.5pf
february 28, 2001 bti confidential & proprietary information page 4 of 4 r f i c s f o r g s m c e l l u l a r g r t t m dual-band gsm & dcs single chip rf transceiver BT2084A p r e l i m i n a r y d a t a s h e e t package information the information provided herein is believed to be accurate and correct. betheltronix, inc. assumes no responsibility for the inaccuracies or use of the information or the use of the described product. betheltronix, inc. reserves the right to make changes in circuit design and/or specifications at any time without further notice. no patent rights or licenses to any of the circuits described herein are implied or granted to any third parties. ? copyright 2001 betheltronix, inc. all rights reserved
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